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Andrei Solodovnikov f3fcd27387 English version draft 
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Lab Course

Useful Resources

Lab Sequence by Group

IB, ICT, CT, RT

  1. Adder (01. Adder)
  2. ALU (02. Arithmetic-logic unit)
  3. Register file and external memory (03. Register file and memory)
  4. Primitive programmable device (04. Primitive programmable device)

PIN, PM

  1. Adder (01. Adder)
  2. ALU (02. Arithmetic-logic unit)
  3. Register file and external memory (03. Register file and memory)
  4. Primitive programmable device (04. Primitive programmable device)
  5. Main decoder (05. Main decoder)
    1. Datapath (07. Datapath)
    2. Load-store unit integration (09. LSU Integration)
    3. Interrupt subsystem integration (11. Interrupt Integration)
  7. Peripheral units (13. Peripheral units)
  8. Programming (14. Programming)

ICS

  1. ALU (02. Arithmetic-logic unit)
    1. Memory (03. Register file and memory)
    2. Primitive programmable device (04. Primitive programmable device)
  3. Main decoder (05. Main decoder)
  4. Datapath (07. Datapath)
    1. Load-store unit (08. Load-store unit)
    2. Load-store unit integration (09. LSU Integration)
    1. Interrupt controller (10. Interrupt subsystem)
    2. Interrupt subsystem integration (11. Interrupt Integration)
  7. Peripheral units (13. Peripheral units)
  8. Programming (14. Programming)