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Andrei Solodovnikov a3cf97621e ЛР5. Исправление тб 
1. Добавлен импорт пакета опкодов
2. Исправлены названия портов декодера
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.pic
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Basic Verilog structures
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Introduction
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Labs
ЛР5. Исправление тб
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Other
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Vivado Basics
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LICENSE
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README.md
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README.md

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Description
Методические материалы по разработке процессора архитектуры RISC-V
fpgariscvsystemverilog
Readme CC-BY-SA-4.0 190 MiB
Languages
SystemVerilog 75.1%
Tcl 16.6%
Assembly 6.3%
C 0.6%
C++ 0.5%
Other 0.9%