MPSU/APS
1
0
Fork 0
mirror of https://github.com/MPSU/APS.git synced 2025-09-15 17:20:10 +00:00
Code Issues Packages Projects Releases Wiki Activity

ЛР2. Исправление подключения АЛУ в nexys_alu

Browse Source
This commit is contained in:
Andrei Solodovnikov
2023-09-19 11:02:52 +03:00
committed by GitHub
parent 99c429bf95
commit 004b2c3bba
1 changed files with 6 additions and 6 deletions
Download Patch File Download Diff File Expand all files Collapse all files

12
Labs/02. Arithmetic-logic unit/board files/nexys_alu.sv
View File

@@ -26,12 +26,12 @@ reg minus;
alu_riscv DUT
(
.ALUOp (operator_i),
.A (operand_a_i),
.B (operand_b_i),
.alu_op_i (operator_i),
.a_i (operand_a_i),
.b_i (operand_b_i),
.Result (result_o),
.Flag (comparison_result_o)
.result_o (result_o),
.flag_o (comparison_result_o)
);
assign operator_i = SW[4:0];
@@ -93,4 +93,4 @@ always @(posedge CLK100) begin
end
end
endmodule
endmodule