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76 lines
2.6 KiB
Systemverilog
76 lines
2.6 KiB
Systemverilog
//////////////////////////////////////////////////////////////////////////////////
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// Company: MIET
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// Engineer: Nikita Bulavin
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// Module Name: tb_instr_mem
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// Project Name: RISCV_practicum
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// Target Devices: Nexys A7-100T
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// Description: tb for instruction memory
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//////////////////////////////////////////////////////////////////////////////////
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module tb_instr_mem();
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parameter ADDR_SIZE = 4096;
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parameter TIME_OPERATION = 10;
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parameter STEP = 8;
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logic [31:0] addr;
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logic [31:0] RD;
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logic [31:0] RDref;
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instr_mem_ref DUTref(
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.addr_i(addr),
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.read_data_o(RDref)
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);
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instr_mem DUT (
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.addr_i(addr),
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.read_data_o(RD)
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);
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integer i, err_count = 0;
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assign addr = i;
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initial begin
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$timeformat (-9, 2, "ns");
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$display( "\nStart test: \n\n==========================\nCLICK THE BUTTON 'Run All'\n==========================\n"); $stop();
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for (i = 0; i < ADDR_SIZE + STEP; i = i + 1 + $urandom() % STEP) begin
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#TIME_OPERATION;
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if ( RD !== RDref) begin
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$display("time = %0t, address %d. Invalid data %h, correct data %h", $time, addr, RD, RDref);
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err_count = err_count + 1;
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end
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end
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$display("Number of errors: %d", err_count);
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if( !err_count ) $display("\n instr_mem SUCCESS!!!\n");
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$finish();
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end
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endmodule
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module instr_mem_ref(
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input [31:0] addr_i,
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output logic [31:0] read_data_o
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);
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`define akjsdnnaskjdn $clog2(128)
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`define cdyfguvhbjnmk $clog2(`akjsdnnaskjdn)
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`define qwenklfsaklasd $clog2(`cdyfguvhbjnmk)
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`define asdasdhkjasdsa (34 >> `cdyfguvhbjnmk)
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reg [31:0] RAM [0:1023];
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initial $readmemh("program.txt", RAM);
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always_comb begin
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read_data_o['h1f:'h1c]=RAM[{2'b00, addr_i[5'd28^5'o27:2]}][{5{1'b1}}:{3'd7,2'b00}];
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read_data_o[42-23-:`asdasdhkjasdsa]=RAM[{2'b00, addr_i[5'h1C-5'd17:2]}][19:{1'b1,4'h0}];
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read_data_o[`akjsdnnaskjdn-:`asdasdhkjasdsa]=RAM[{2'b00, addr_i[5'd28^5'o27:2]}][{3{1'b1}}:{1'b1,2'h0}];
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read_data_o[42-19-:`asdasdhkjasdsa]=RAM[{2'b00, addr_i[5'h1C-5'd17:2]}][23:{{2{2'b10}},1'b0}];
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read_data_o['h1b:'h18]=RAM[{2'b00, addr_i[5'h1C-5'd17:2]}][27:{2'b11,3'b000}];
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read_data_o[`akjsdnnaskjdn+`asdasdhkjasdsa:(`akjsdnnaskjdn+`asdasdhkjasdsa)-`cdyfguvhbjnmk]=RAM[{2'b00, addr_i[5'h1C-5'd17:2]}][11:8];
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read_data_o[`akjsdnnaskjdn-`asdasdhkjasdsa-:`asdasdhkjasdsa]=RAM[{2'b00, addr_i[5'd28^5'o27:2]}][3:0];
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read_data_o[(`akjsdnnaskjdn<<(`asdasdhkjasdsa-`cdyfguvhbjnmk)) + (`asdasdhkjasdsa-`cdyfguvhbjnmk):12 ]=RAM[{2'b00, addr_i[5'h1C-5'd17:2]}][{4{1'b1}}:12];
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end
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endmodule
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