MPSU/APS
1
0
Fork 0
mirror of https://github.com/MPSU/APS.git synced 2025-09-15 17:20:10 +00:00
Code Issues Packages Projects Releases Wiki Activity

ЛР2. Исправление подключения модуля в nexys_alu

Browse Source
This commit is contained in:
Andrei Solodovnikov
2024-09-09 14:35:29 +03:00
committed by GitHub
parent 8396bb51ab
commit ffec97f5ac
1 changed files with 1 additions and 1 deletions
Download Patch File Download Diff File Expand all files Collapse all files

2
Labs/02. Arithmetic-logic unit/board files/nexys_alu.sv
View File

@@ -45,7 +45,7 @@ module nexys_alu(
logic [31:0] result;
logic flag;
alu_riscv alu_riscv (
alu alu_riscv (
.alu_op_i (operator),
.a_i (operand_a),
.b_i (operand_b),