# How to Program the FPGA

Once you have described and verified your module, the next step is to prototype it on an FPGA. For this purpose, most lab folders contain a `board_files` subfolder with the necessary files. Typically, it will contain a top-level module and a constraints file that connect your logic to the peripherals on the `Nexys-A7` board.

To build the final project, you need to:

1. Add the top-level module (contained in a file with the `.sv` extension) to the `Design Sources` of your project.
2. Set the added module as the top-level module of your project.
   1. Right-click on it.
   2. Select `Set as Top` from the context menu.
3. Add the constraints file (with the `.xdc` extension) to the `Constraints` of your project. If such a file already exists in your project (and it will, starting from the first lab), you need to replace the contents of the old file with the contents of the new one. Constraints change from lab to lab.

After completing these steps, your project is ready for bitstream generation — the binary file used to reconfigure the FPGA.

In essence, the entire process of generating the bitstream and programming the FPGA comes down to sequentially clicking the following four buttons in the `PROGRAM AND DEBUG` group of the `Flow Navigator` window, shown in _fig. 1_.

![../.pic/Vivado%20Basics/07.%20Program%20and%20debug/fig_1.png](../.pic/Vivado%20Basics/07.%20Program%20and%20debug/fig_1.png)

_Figure 1. Steps for compiling the project and programming the FPGA._

Clicking `Generate Bitstream` generates the binary configuration file for the FPGA. If the synthesis and implementation steps have not been completed beforehand, pop-up windows will appear prompting you to run them. Simply confirm all pop-up windows (using `YES`/`OK` — the number of windows will vary depending on the state of your project). The final window, confirming that the binary file is ready, will be `Bitstream Generation Completed` (provided all steps completed without errors).

Now you need to program the FPGA. Connect the development board to the USB port of your computer and power it on.

Then launch the Vivado Hardware Manager by clicking `Open Hardware Manager` (button 2 in _fig. 1_).

Next, connect to the FPGA by clicking `Open Target` (button 3 in _fig. 1_) and selecting `Auto Connect` from the context menu.

The final step is to program the FPGA by clicking `Program Device` (button 4 in _fig. 1_). A pop-up window will appear asking you to select the binary configuration file; the field will be automatically filled with the path to the last generated file. You do not need to change anything — simply click `Program`.

A window with an FPGA reconfiguration progress indicator will then appear. Once the window closes, the FPGA will be configured as the prototype of your module.