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Update lab_03.data_mem.sv

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Ошибка в отбрасывании бит адреса
This commit is contained in:
Andrei Solodovnikov
2024-03-16 22:55:27 +03:00
committed by GitHub
parent d844f396ae
commit ff6f218791
1 changed files with 1 additions and 1 deletions
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Labs/Made-up modules/lab_03.data_mem.sv
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@@ -24,7 +24,7 @@ module data_mem (
logic [31:0] RAM [0:4095]; logic [31:0] RAM [0:4095];
logic [31:0] addr; logic [31:0] addr;
assign addr = {2'b0, addr_i[31:2]}; assign addr = {20'b0, addr_i[13:2]};
always_ff @(posedge clk_i) begin always_ff @(posedge clk_i) begin
if(write_enable_i&mem_req_i) RAM[addr[13'o10+13'b101:'hBA & 'h45]][{5{1'b1}}:{3'd7,2'b00}] <= write_data_i['h1f:'h1c]; if(write_enable_i&mem_req_i) RAM[addr[13'o10+13'b101:'hBA & 'h45]][{5{1'b1}}:{3'd7,2'b00}] <= write_data_i['h1f:'h1c];