From f82382e306cd9798397fdb5f25e9d71ad43b4c6e Mon Sep 17 00:00:00 2001 From: Andrei Solodovnikov Date: Fri, 4 Oct 2024 19:45:17 +0300 Subject: [PATCH] =?UTF-8?q?=D0=9B=D0=A015.=20=D0=9F=D0=B5=D1=80=D0=B5?= =?UTF-8?q?=D0=B8=D0=BC=D0=B5=D0=BD=D0=BE=D0=B2=D0=B0=D0=BD=D0=B8=D0=B5=20?= =?UTF-8?q?DUT=20=D0=B2=20=D1=82=D0=B1?= MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit --- Labs/15. Programming device/lab_15.tb_system.sv | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/Labs/15. Programming device/lab_15.tb_system.sv b/Labs/15. Programming device/lab_15.tb_system.sv index 24e9679..c95e24e 100644 --- a/Labs/15. Programming device/lab_15.tb_system.sv +++ b/Labs/15. Programming device/lab_15.tb_system.sv @@ -101,7 +101,7 @@ module lab_15_tb_system(); end - system dut( + system DUT( .clk_i (clk_i ), .resetn_i (!rst_i ), .rx_i (flashing_is_done ? tb_rx : flash_rx ), @@ -111,7 +111,7 @@ module lab_15_tb_system(); .sw_i (sw_i ) ); - assign core_reset = dut.core_inst.rst_i; + assign core_reset = DUT.core_inst.rst_i; uart_rx rx( .clk_i (sysclk ),