From f6815409e235360c0e5d22dc41f19864f42d0eaf Mon Sep 17 00:00:00 2001 From: Andrei Solodovnikov Date: Sat, 23 Nov 2024 17:18:11 +0300 Subject: [PATCH] =?UTF-8?q?=D0=9B=D0=A08.=20=D0=9E=D0=B1=D0=BD=D0=BE=D0=B2?= =?UTF-8?q?=D0=BB=D0=B5=D0=BD=D0=B8=D0=B5=20=D0=B8=D0=BC=D0=B5=D0=BD=D0=B8?= =?UTF-8?q?=20=D0=B3=D0=BE=D1=82=D0=BE=D0=B2=D0=BE=D0=B3=D0=BE=20=D0=BC?= =?UTF-8?q?=D0=BE=D0=B4=D1=83=D0=BB=D1=8F?= MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit --- Labs/Made-up modules/lab_08.lsu.sv | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/Labs/Made-up modules/lab_08.lsu.sv b/Labs/Made-up modules/lab_08.lsu.sv index 7024da9..bc5069b 100644 --- a/Labs/Made-up modules/lab_08.lsu.sv +++ b/Labs/Made-up modules/lab_08.lsu.sv @@ -8,7 +8,7 @@ See https://github.com/MPSU/APS/blob/master/LICENSE file for licensing details. * ------------------------------------------------------------------------------ */ -module riscv_lsu( +module lsu( input logic clk_i, input logic rst_i, input logic core_req_i,