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Обновление тестбенчей
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@@ -15,7 +15,7 @@ module lab_05_tb_decoder();
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typedef class riscv_instr;
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riscv_instr instr = new();
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logic clk, test_has_been_finished;
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logic clk;
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logic [31:0] fetched_instr_i = '0;
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int err_count;
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@@ -136,8 +136,10 @@ module lab_05_tb_decoder();
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illegal_instrs_random_test();
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$display("\nTest has been finished\nNumber of errors: %d\n", err_count);
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test_has_been_finished = 1'b1;
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$finish();
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#5;
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$display("You're trying to run simulation that has finished. Aborting simulation.")
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$fatal();
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end
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function void randomize_with_given_opcode(input logic[4:0] given_opcode);
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@@ -348,17 +350,12 @@ module lab_05_tb_decoder();
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bit test_paused_by_errs;
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initial begin
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clk = '0;
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test_has_been_finished = '0;
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err_count = '0;
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test_paused_by_errs = '0;
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end
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always #5 clk = ~clk;
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always @(posedge clk) begin
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if(test_has_been_finished) begin
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$finish();
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end
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end
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always @(posedge clk) begin
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if((err_count >= 10) & !test_paused_by_errs) begin
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