From da422cfccb37bce3850bd16c4a1beec417fe726f Mon Sep 17 00:00:00 2001
From: Andrei Solodovnikov <VoultBoy@yandex.ru>
Date: Tue, 19 May 2026 14:17:31 +0300
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Fix the instantiation of the adder module in the testbench.
---
 Other/FAQ.md | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/Other/FAQ.md b/Other/FAQ.md
index c9208a6..6505e71 100644
--- a/Other/FAQ.md
+++ b/Other/FAQ.md
@@ -139,7 +139,7 @@ endmodule
 module testbench();
 logic A, B, C;
 
-adder DUT(
+half_adder DUT(
   .A(A),  // <- здесь будет ошибка,
           // т.к. в модуле half_adder нет порта 'A'
   .b(B),