Merge pull request #5 from Nekkit6/master

Правки тб памяти
This commit is contained in:
Andrei Solodovnikov
2023-09-18 21:52:50 +03:00
committed by GitHub
4 changed files with 1151 additions and 10414 deletions

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@@ -21,8 +21,9 @@
module tb_data_mem();
parameter ADDR_SIZE = 4096;
parameter TIME_OPERATION = 50;
parameter ADDR_SIZE = 16384;
parameter TIME_OPERATION = 20;
parameter STEP = 8;
logic CLK;
logic REQ;
@@ -41,9 +42,7 @@ parameter TIME_OPERATION = 50;
);
logic [31:0] RDa;
integer i, err_count = 0;
assign A = i;
parameter CLK_FREQ_MHz = 100;
@@ -57,7 +56,7 @@ parameter TIME_OPERATION = 50;
$display( "\nStart test: \n\n==========================\nCLICK THE BUTTON 'Run All'\n==========================\n"); $stop();
REQ = 1;
WE = 0;
i = 1; #10;
i = 0; #10;
if (RD !== 32'hx) begin
$display("The data memory should not be initialized by the $readmemh function");
err_count = err_count + 1;
@@ -67,8 +66,8 @@ parameter TIME_OPERATION = 50;
WE = 1;
WD = $urandom;
end
for (i = 0; i < (ADDR_SIZE+1); i = i + 1) begin
if (i != (ADDR_SIZE+1)) begin
for (i = 0; i < (ADDR_SIZE+STEP); i = i + 1 + $urandom() % STEP) begin
if (i < (ADDR_SIZE)) begin
REQ = |($urandom %10);
WE = 0;
#TIME_OPERATION;
@@ -87,10 +86,11 @@ parameter TIME_OPERATION = 50;
end
end
else begin
WE = 0;
REQ = 1;
#TIME_OPERATION;
if (RD !== 32'd3735928559) begin
$display("When reading (write_enable_i = %h) at an address greater than 4095, it should return dead_beef yor data: %h_%h, time: %t", WE, RD[31:16],RD[15:0], $time);
$display("When reading (write_enable_i = %h) at address greater than 16383 (current addr = %d), it should return dead_beef, but your data: %h_%h, time: %t", WE, A, RD[31:16],RD[15:0], $time);
err_count = err_count + 1;
end
end
@@ -98,31 +98,29 @@ parameter TIME_OPERATION = 50;
end
#TIME_OPERATION;
REQ = 1;
WE = 1;
#TIME_OPERATION;
for (i = 0; i < 8; i = i + 4) begin
WD = i? 32'hfecd_ba98: 32'h7654_3210;
#TIME_OPERATION;
end
WE = 0;
i = 2;
#TIME_OPERATION;
if (RD !== 32'hba98_7654) begin
$display("data is being written to the cell incorrectly. RAM [0:7] must be 0x0123456789abcdef, time: %t", $time);
for (i = 0; i < 4; i = i + 1) begin
if(i==0) begin
repeat(2)@(posedge CLK);
RDa = RD;
end else
if(RD !== RDa) begin
$display("incorrect conversion of the reading address = %h, time: %t", A, $time);
err_count = err_count + 1;
end
@(posedge CLK)
i = 0;
#TIME_OPERATION;
end
i = 0; WE = 0; REQ = 1;
@(posedge CLK);
@(negedge CLK);
if (RD !== 32'hba98_7654) begin
i = 4;
#1; RDa = RD;
@(posedge CLK); #1;
if (RD == RDa) begin
$display("reading from data memory must be synchronous, time: %t", $time);
err_count = err_count + 1;
end
@(posedge CLK); #5;
if (RD !== 32'h7654_3210) begin
$display("synchronous data memory read error, time: %t", $time);
err_count = err_count + 1;
end
$display("Number of errors: %d", err_count);
if( !err_count ) $display("\ndata_mem SUCCESS!!!\n");
$finish();

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