From 81525de5f4a0492b28eedcd903e59f94af53f65b Mon Sep 17 00:00:00 2001 From: alexkharl Date: Tue, 27 Feb 2024 13:56:32 +0300 Subject: [PATCH] =?UTF-8?q?Fix(03/board/nexys=5Frf):=D0=98=D1=81=D0=BF?= =?UTF-8?q?=D1=80-=D0=B8=D0=B5=20=D0=BC=D0=B0=D0=BF=D0=B8=D0=BD=D0=B3?= =?UTF-8?q?=D0=B0=20=D0=BA=D0=BD=D0=BE=D0=BF=D0=BE=D0=BA?= MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit --- .../board files/nexys_rf_riscv.sv | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/Labs/03. Register file and memory/board files/nexys_rf_riscv.sv b/Labs/03. Register file and memory/board files/nexys_rf_riscv.sv index fa4cd53..675804a 100644 --- a/Labs/03. Register file and memory/board files/nexys_rf_riscv.sv +++ b/Labs/03. Register file and memory/board files/nexys_rf_riscv.sv @@ -115,7 +115,7 @@ module nexys_rf_riscv( logic [4:0] ra2_next; assign ra2_next = addresses_next[1]; logic addresses_en; - assign addresses_en = btnr_i; + assign addresses_en = btnd_i; always_ff @(posedge clk_i or negedge arstn_i) begin if (!arstn_i) begin wa_ff <= '0; @@ -133,7 +133,7 @@ module nexys_rf_riscv( logic [15:0] wd_ff; logic wd_en; - assign wd_en = btnd_i; + assign wd_en = btnr_i; logic [15:0] wd_next; assign wd_next = sw_i; always_ff @(posedge clk_i or negedge arstn_i) begin