From 78ff35477bd8cff0f3ca94b4d0d6b85d7cb6f241 Mon Sep 17 00:00:00 2001 From: Andrei Solodovnikov Date: Wed, 16 Sep 2026 16:38:55 +0300 Subject: [PATCH] =?UTF-8?q?=D0=9B15.=20=D0=98=D1=81=D0=BF=D1=80=D0=B0?= =?UTF-8?q?=D0=B2=D0=BB=D0=B5=D0=BD=D0=B8=D0=B5=20=D0=B8=D0=B5=D1=80=D0=B0?= =?UTF-8?q?=D1=80=D1=85=D0=B8=D1=87=D0=B5=D1=81=D0=BA=D0=BE=D0=B3=D0=BE=20?= =?UTF-8?q?=D0=BF=D0=BE=D0=B4=D0=BA=D0=BB=D1=8E=D1=87=D0=B5=D0=BD=D0=B8?= =?UTF-8?q?=D1=8F=20core?= MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit --- Labs/15. Programming device/lab_15.tb_processor_system.sv | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/Labs/15. Programming device/lab_15.tb_processor_system.sv b/Labs/15. Programming device/lab_15.tb_processor_system.sv index 26f95f2..1d8afc7 100644 --- a/Labs/15. Programming device/lab_15.tb_processor_system.sv +++ b/Labs/15. Programming device/lab_15.tb_processor_system.sv @@ -111,7 +111,7 @@ module lab_15_tb_processor_system(); .sw_i (sw_i ) ); - assign core_reset = DUT.core_inst.rst_i; + assign core_reset = DUT.core.rst_i; uart_rx rx( .clk_i (sysclk ),