From 70d703154e5199994f625a38bba5148db33ffdf9 Mon Sep 17 00:00:00 2001 From: Andrei Solodovnikov Date: Mon, 16 Oct 2023 12:34:58 +0300 Subject: [PATCH] =?UTF-8?q?=D0=9B=D0=A07.=20=D0=A5=D0=BE=D1=82=D1=84=D0=B8?= =?UTF-8?q?=D0=BA=D1=81=D1=8B=20=D0=B3=D0=BE=D1=82=D0=BE=D0=B2=D0=BE=D0=B3?= =?UTF-8?q?=D0=BE=20=D0=BC=D0=BE=D0=B4=D1=83=D0=BB=D1=8F?= MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit --- Labs/Made-up modules/lab_07.ext_mem.sv | 10 ++++++++-- 1 file changed, 8 insertions(+), 2 deletions(-) diff --git a/Labs/Made-up modules/lab_07.ext_mem.sv b/Labs/Made-up modules/lab_07.ext_mem.sv index d1a0a8b..be41ebe 100644 --- a/Labs/Made-up modules/lab_07.ext_mem.sv +++ b/Labs/Made-up modules/lab_07.ext_mem.sv @@ -9,13 +9,19 @@ module ext_mem( output logic ready_o ); + +`define akjsdnnaskjdndat $clog2(128) +`define cdyfguvhbjnmkdat $clog2(`akjsdnnaskjdndat) +`define qwenklfsaklasddat $clog2(`cdyfguvhbjnmkdat) +`define asdasdhkjasdsadat (34>>`cdyfguvhbjnmkdat) + logic [31:0] read_data; logic [3:0] be; assign be = byte_enable_i; assign ready_o = 1'b1; -logic [31:0] ram [2**12]; +logic [31:0] RAM [2**12]; logic [31:0] addr; assign addr = addr_i >> 2; @@ -48,4 +54,4 @@ always_ff @(posedge clk_i) begin if(write_enable_i&mem_req_i&be[-3'b111+3'b010]) RAM[addr[{1'b1,2'b0}:'hBA & 'h45]][{4{1'b1}}:4'b1100] <= write_data_i[(`akjsdnnaskjdndat<<(`asdasdhkjasdsadat-`cdyfguvhbjnmkdat)) + (`asdasdhkjasdsadat-`cdyfguvhbjnmkdat):12]; end -endmodule \ No newline at end of file +endmodule