Различия между блокирующими и неблокирующими присваиваниями

Browse Source

...

This commit is contained in:

Andrei Solodovnikov

2024-02-02 15:34:44 +03:00

parent 43fd6027c3

commit 34274ccb40

14 changed files with 446 additions and 0 deletions

Show all changes Ignore whitespace when comparing lines Ignore changes in amount of whitespace Ignore changes in whitespace at EOL

Download Patch File Download Diff File Expand all files Collapse all files

4

.pic/Basic Verilog structures/assignments/fig_01.drawio.svg Normal file

File diff suppressed because one or more lines are too long

Side by Side After Width:  |  Height:  |  Size: 166 KiB

4

.pic/Basic Verilog structures/assignments/fig_02.drawio.svg Normal file

File diff suppressed because one or more lines are too long

Side by Side After Width:  |  Height:  |  Size: 181 KiB

4

.pic/Basic Verilog structures/assignments/fig_03.drawio.svg Normal file

File diff suppressed because one or more lines are too long

Side by Side After Width:  |  Height:  |  Size: 25 KiB

BIN

.pic/Basic Verilog structures/assignments/fig_04.png Normal file

Binary file not shown.

Side by Side After Width:  |  Height:  |  Size: 9.5 KiB

4

.pic/Basic Verilog structures/assignments/fig_05.drawio.svg Normal file

File diff suppressed because one or more lines are too long

Side by Side After Width:  |  Height:  |  Size: 27 KiB

BIN

.pic/Basic Verilog structures/assignments/fig_06.png Normal file

Binary file not shown.

Side by Side After Width:  |  Height:  |  Size: 20 KiB

BIN

.pic/Basic Verilog structures/assignments/fig_07.png Normal file

Binary file not shown.

Side by Side After Width:  |  Height:  |  Size: 20 KiB

BIN

.pic/Basic Verilog structures/assignments/fig_08.png Normal file

Binary file not shown.

Side by Side After Width:  |  Height:  |  Size: 15 KiB

BIN

.pic/Basic Verilog structures/assignments/fig_09.png Normal file

Binary file not shown.

Side by Side After Width:  |  Height:  |  Size: 15 KiB

BIN

.pic/Basic Verilog structures/assignments/fig_10.png Normal file

Binary file not shown.

Side by Side After Width:  |  Height:  |  Size: 16 KiB

BIN

.pic/Basic Verilog structures/assignments/fig_11.png Normal file

Binary file not shown.

Side by Side After Width:  |  Height:  |  Size: 38 KiB

BIN

.pic/Basic Verilog structures/assignments/fig_12.png Normal file

Binary file not shown.

Side by Side After Width:  |  Height:  |  Size: 14 KiB

4

.pic/Basic Verilog structures/assignments/fig_13.drawio.svg Normal file

File diff suppressed because one or more lines are too long

Side by Side After Width:  |  Height:  |  Size: 218 KiB