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ЛР6. Обновление тб

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Для проверки реализации stall-а, используется иерархическое подключение. Оно накладывает требования на нейминг нескольких сигналов, однако куда проще наложить требование на название одного контретного модуля.
This commit is contained in:
Andrei Solodovnikov
2023-10-22 20:41:25 +03:00
parent b7da6e5c20
commit 15d7b8ee3a
2 changed files with 8 additions and 5 deletions
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12
Labs/06. Datapath/tb_riscv_unit.sv
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@@ -42,10 +42,12 @@ module tb_riscv_unit();
end
stall_seq: assert property (
@(posedge clk)
disable iff ( !unit.mem_req )
$past(unit.mem_req) |-> !$stable(unit.stall)
)else $error("\n================================================\nThe realisation of the STALL signal is INCORRECT\n================================================\n");
@(posedge unit.core.clk_i) disable iff ( unit.core.rst_i )
unit.core.mem_req_o |-> (unit.core.stall_i || $past(unit.core.stall_i))
)else $error("\nincorrect implementation of stall signal\n");
stall_seq_fall: assert property (
@(posedge unit.core.clk_i) disable iff ( unit.core.rst_i )
(unit.core.stall_i) |=> !unit.core.stall_i
)else $error("\nstall must fall exact one cycle after rising\n");
endmodule